1. Field of the Invention
The present invention relates generally to methods for forming patterned layers within microelectronic fabrications. More particularly, the present invention relates to plasma etch methods for forming patterned layers within microelectronics fabrications.
2. Description of the Related Art
Microelectronic fabrications are formed from microelectronic substrates over which are formed patterned microelectronics conductor layers which are separated by microelectronic dielectric layers. As microelectronic fabrication integration levels have increased, it has become common within the art of microelectronic fabrication to form patterned microelectronic conductor layers with increasingly narrower linewidth dimensions. While a need for forming patterned microelectronic conductor layers within increasingly narrower linewidth dimensions within microelectronic fabrications will certainly continue, patterned microelectronic conductor layers are typically not formed with increasingly narrower linewidth dimensions within microelectronic fabrications entirely without problems. In that regard, it is known in the art of microelectronic fabrication that when forming a patterned microelectronic conductor layer within a microelectronic fabrication while employing a plasma etch method, there is often observed an electrical charging of the patterned microelectronic conductor layer in a fashion which upon discharge may provide compromised operation of a microelectronics fabrication within which is formed the patterned microelectronic conductor layer formed employing the plasma etch method.
It is thus towards the goal of forming within microelectronic fabrications patterned microelectronic conductor layers while employing plasma etch methods, while simultaneously attenuating plasma induced electrical charging of those patterned microelectronic conductor layers formed employing those plasma etch methods, that the present invention is more specifically directed. In a more general sense, it is also towards the goal of forming within microelectronic fabrications patterned microelectronic layers, which need not necessarily be patterned microelectronic conductor layers, while employing plasma etch methods and while simultaneously attenuating plasma induced electrical charging of those patterned microelectronic layers, that the present invention is generally directed.
Various plasma etch methods and plasma etch apparatus have been disclosed in the art of microelectronic fabrication for forming patterned microelectronic layers within microelectronic fabrications.
For example, Collins et al., in U.S. Pat. No. 5,556,501, discloses a radio frequency plasma processing apparatus which may be employed for forming within microelectronic fabrications microelectronic devices and patterned microelectronic conductor layers with attenuated plasma induced damage and attenuated microloading. The plasma processing apparatus employs an inductively coupled radio frequency plasma antenna to provide a high density low energy plasma for etching microelectronic materials within the plasma processing apparatus, where a radio frequency bias power may be applied to a substrate processed within the plasma processing apparatus independent of an inductively coupled radio frequency source power employed for forming the high density low energy plasma.
In addition, Keller et al., in U.S. Pat. No. 5,587,045, discloses a plasma processing apparatus which may be employed within a plasma processing method in order to reduce a number of particles collected upon a substrate when processing the substrate while employing the plasma processing method in conjunction with the plasma processing apparatus. The plasma processing apparatus realizes the foregoing result by imposing a slight negative potential on the substrate at all times when not directly plasma processing the substrate while employing the plasma processing method in conjunction with the plasma processing apparatus.
Further, Mintz, et al., in U.S. Pat. No. 5,618,382, discloses a plasma processing apparatus which provides a reduced self-bias within a powered electrode within the plasma processing apparatus such that softer plasma processes which do not damage thin layers may be employed within the plasma processing apparatus. In order to achieve the foregoing results, the plasma apparatus operates at a frequency significantly above 13.56 MHZ.
Still further, Salimian et al., in U.S. Pat. No. 5,656,123, also discloses a plasma processing apparatus which may be employed to provide a plasma having a high plasma density and a low sheath bias voltage for plasma processing a substrate employed within a microelectronic fabrication. The plasma processing apparatus employs a dual frequency triode, where a very high frequency within the dual frequency triode is employed to form the high density plasma with the low sheath bias voltage, and a low frequency within the dual frequency triode is employed to supply an independent substrate bias.
Finally, Diaz, in U.S. Pat. No. 5,760,445, discloses a microelectronic device which may be employed to protect against a plasma induced charge build-up on a thin gate oxide within a field effect transistor (FET) when plasma etching a microelectronic structure which electrically communicates with the thin gate oxide within the field effect transistor (FET). The microelectronic device which realizes the foregoing properties is characterized as a P-metal oxide semiconductor field effect transistor (P-MOSFET).
Desirable in the art of microelectronic fabrication are additional plasma etch methods which may be employed for forming patterned microelectronic layers with attenuated plasma induced damage. It is towards the foregoing object that the present invention is directed.